DocumentCode :
2250514
Title :
A Simulink-to-FPGA Co-Design of Encryption Module
Author :
Li, Xiaoying ; Sun, Fuming ; Wu, Enhua
Author_Institution :
Dept. of Comput. & Inf. Sci., Macau Univ., Macao
fYear :
2006
fDate :
4-7 Dec. 2006
Firstpage :
2008
Lastpage :
2011
Abstract :
In this paper, circuit design of an arithmetic module applied to cryptography - modulo multiplicative inverse is presented and implemented using FPGA hardware technology. This modular arithmetic function contains iterative computations of division, multiplication and accumulation with variable loop times. Besides standard HDL programming and schematic input, Simulink-to-FPGA has been tried as a different design flow. Experimental results are compared between different design methods with discussion of their pros and cons
Keywords :
cryptography; field programmable gate arrays; hardware description languages; integrated circuit design; iterative methods; FPGA hardware technology; HDL programming; Simulink-to-FPGA; arithmetic module; circuit design; cryptography; encryption module; modulo multiplicative inverse; Arithmetic; Circuit synthesis; Cryptography; Delay; Design methodology; Digital signal processing; Field programmable gate arrays; Flowcharts; Hardware design languages; Mathematical model; FPGA; Simulink; arithmetic unit; modulo;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
Type :
conf
DOI :
10.1109/APCCAS.2006.342282
Filename :
4145813
Link To Document :
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