Title :
A low-phase-noise area-efficient 3-D LC VCO in standard 0.18-um CMOS technology
Author :
Chen, Hsiao-Chin ; Wang, Tao ; Lu, Shey-Shi ; Huang, Guo-Wei
Author_Institution :
Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Abstract :
A miniaturized (0.224 mm2) 4.5~5.0 GHz 3-D LC VCO possessing area-efficient metal-6 on-chip inductors is implemented in 0.18 um 1P6M CMOS technology. With inductors directly above the other devices, this VCO shows a measured phase noise of -124.6 dBc/Hz at 1 MHz offset from the 4.9 GHz carrier while dissipating 24 mW. The figure-of-merit (-184.7 dBc/Hz) achieved is better than most of the previous state-of-art results of the CMOS LC VCOs while occupying only half the die area
Keywords :
CMOS integrated circuits; inductors; phase noise; voltage-controlled oscillators; 0.18 mum; 1 MHz; 1P6M CMOS technology; 24 mW; 4.9 GHz; area-efficient metal-6 on-chip inductors; die area; figure-of-merit; low-phase-noise area-efficient 3D LC VCO; voltage controlled oscillators; CMOS technology; Circuit synthesis; Costs; Inductors; Low-noise amplifiers; MOSFET circuits; Phase noise; Radio frequency; Radiofrequency amplifiers; Voltage-controlled oscillators;
Conference_Titel :
Electrotechnical Conference, 2006. MELECON 2006. IEEE Mediterranean
Conference_Location :
Malaga
Print_ISBN :
1-4244-0087-2
DOI :
10.1109/MELCON.2006.1653072
