Title :
On the Reduction of the Number of Coefficient Circuits in a DTCNN Cell
Author :
Fernandez, Natalia A. ; Brea, Victor M. ; Vilariño, David L. ; Cabello, Diego
Author_Institution :
Dept. of Electron. & Comput. Sci., Santiago de Compostela Univ.
Abstract :
This paper introduces a methodology to reduce the number of coefficient circuits in a DTCNN cell without penalty at application level. Trade-offs like area-processing time, and some other figures of merit like accuracy and power dissipation are considered. It is shown that it is possible to obtain efficient implementations with a reduced number of coefficient circuits. Some examples illustrate the proposal
Keywords :
cellular neural nets; DTCNN cell; SIMD; area-processing time; coefficient circuits; hardware reduction; Application software; Cellular neural networks; Circuits; Computer science; Hardware; Image processing; Parallel processing; Piecewise linear techniques; Proposals; CNN; Hardware reduction; PLS; SIMD; trade-off area-time;
Conference_Titel :
Cellular Neural Networks and Their Applications, 2006. CNNA '06. 10th International Workshop on
Conference_Location :
Istanbul
Print_ISBN :
1-4244-0639-0
Electronic_ISBN :
1-4244-0640-4
DOI :
10.1109/CNNA.2006.341599
