• DocumentCode
    2251476
  • Title

    Design a co-processor for Output Probability Calculation in speech recognition

  • Author

    Li, Peng ; Tang, Hua

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Duluth, MN, USA
  • fYear
    2009
  • fDate
    24-27 May 2009
  • Firstpage
    369
  • Lastpage
    372
  • Abstract
    In the CHMM (Continuous Hidden Markov Model) based speech recognition algorithm, Output Probability Calculation (OPC) is the most computation-intensive part. To reduce power consumption and design cost, this paper presents a custom-designed co-processor to implement OPC. The standard SRAM interface of the co-processor allows it to be controlled by various micro-controllers. The co-processor has been implemented in standard-cell based approach and manufactured in 0.18 mum UMC technology. Tested with a 358-state 3-mixture 27-feature 800-word HMM, the co-processor operates at 10 MHz to meet real-time requirement. The power consumption of this co-processor is 1.6 mW, and the die size is 1.18 mm2.
  • Keywords
    SRAM chips; coprocessors; hidden Markov models; microcontrollers; peripheral interfaces; probability; speech recognition; SRAM interface; UMC technology; continuous hidden Markov model; custom-designed co-processor; frequency 10 MHz; microcontroller; output probability calculation; power 1.6 mW; power consumption; size 0.18 mum; speech recognition algorithm; Algorithm design and analysis; Coprocessors; Costs; Digital signal processing; Energy consumption; Hardware; Hidden Markov models; Probability; Random access memory; Speech recognition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3827-3
  • Electronic_ISBN
    978-1-4244-3828-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2009.5117762
  • Filename
    5117762