Impacts of NBTI and PBTI on power-gated SRAM with high-k metal-gate devices

The threshold voltage (V_T) drift induced by negative bias temperature instability (NBTI) weakens PFETs, while positive bias temperature instability (PBTI) weakens NFETs fabricated with high-k metal-gate, respectively. These long-term V_T drifts degrade SRAM cell stability, margin and performance, and may lead to functional failure over the life of usage. Additionally, most state-of-the-art SRAMs are designed with power-gating structures to reduce leakage currents in Standby or Sleep mode, and the power switches suffer NBTI or PBTI stress/degradation as well. This paper presents a comprehensive analysis on the impacts of NBTI and PBTI on power-gated SRAM arrays with high-k metal-gate devices. NBTI/PBTI tolerant sense amplifier structures are also discussed.