DocumentCode
2251976
Title
Realization of TDOA estimation architectures
Author
Loomis, Herschel H., Jr. ; Bernstein, Raymond F., Jr.
Author_Institution
Dept. of Electr. & Comput. Eng., Naval Postgraduate Sch., Monterey, CA, USA
fYear
1993
fDate
1-3 Nov 1993
Firstpage
1143
Abstract
An architecture for the computation of time difference of arrival (TDOA) estimates is proposed. The structure of the various principal components is developed and a complexity analysis is presented. Realization using pipeline FFT and vector processing chips is considered. Conclusions are reached concerning the preferred spectral correlation and TDOA computing algorithms
Keywords
array signal processing; computational complexity; digital signal processing chips; fast Fourier transforms; parallel architectures; parameter estimation; pipeline processing; spectral analysis; vector processor systems; TDOA estimation architectures; complexity analysis; pipeline FFT chip; spectral correlation; time difference of arrival; vector processing chip; Binary phase shift keying; Computer architecture; Frequency; Phase shift keying; Pipelines; Position measurement; Signal detection; Signal to noise ratio; Smoothing methods; Spectral analysis; Time difference of arrival;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 1993. 1993 Conference Record of The Twenty-Seventh Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
0-8186-4120-7
Type
conf
DOI
10.1109/ACSSC.1993.342392
Filename
342392
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