Transient analysis of nonlinear settling behavior in charge-pump phase-locked loop design

This paper describes a practical settling time analysis of the charge-pump phase-locked loop (PLL) by considering nonlinear circuit effects on transient settling behavior; a PLL slew rate, a PFD reset delay, and a loop filter charge sharing. A transient analysis including those parameters with a refined lock-in range is given, showing that the overall settling time can be significantly affected by the nonlinear factors even with the same PLL bandwidth. Behavioral simulation results verify that the proposed analysis predicts the transient settling time more accurately than existing methods.