DocumentCode
2252883
Title
A novel CMOS four quadrant multiplier based on linearization of the long tail differential pair
Author
Ismail, Aly M. ; Soliman, Ahmed M.
Author_Institution
Dept. of Electron. & Commun. Eng., Cairo Univ., Giza, Egypt
Volume
5
fYear
2000
fDate
2000
Firstpage
485
Abstract
In this paper, a novel circuit design technique for linearizing differential pairs is proposed. It is shown that the proposed linearized transconductor offers excellent linearity and exceptionally wide operating range which makes it suitable for operating in analog processing applications. PSpice simulation results are given
Keywords
CMOS analogue integrated circuits; analogue multipliers; linearisation techniques; CMOS four quadrant multiplier; PSpice simulation; analog processing applications; differential pair linearization; linearized transconductor; long tail differential pair; wide operating range; Circuit simulation; Circuit synthesis; Filters; Linearity; Probability distribution; Signal processing; Tail; Transconductance; Transconductors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location
Geneva
Print_ISBN
0-7803-5482-6
Type
conf
DOI
10.1109/ISCAS.2000.857477
Filename
857477
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