Title :
Twenty Seventh Annual IEEE/CPMT/SEMI International Electronics Manufacturing Technology Symposium (Cat. No.02CH37299)
Keywords :
assembling; encapsulation; environmental factors; flip-chip devices; lead bonding; modelling; packaging; printed circuits; production testing; reliability; soldering; board level interconnection processes; electrical modeling; environmentally sustainable electronics; flip-chip processing; flip-chip underfill; form factor package; lead-free electronic manufacturing; manufacturing optimization; manufacturing test; optoelectronic assembly; packaging; process optimization; reliability; thermal modeling; virtual methods; wirebonding techniques;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-7301-4
DOI :
10.1109/IEMT.2002.1032713
