A low-noise monolithic CMOS bio-potential detector

Bio-potential detection is important for bio-medical diagnostics and research. Bio-potentials are generally weak (muV) with high offsets (100 mV level). Low noise processing is critical to extract the signal. In this paper, we report the design of a single-chip CMOS bio-potential detector. The design uses chopping to suppress the low-frequency noise in CMOS amplifiers. The strong offset is removed by a high gain feedback loop with a low pass filter with 1 Hz cut-off frequency. A high-gain front stage is designed to further suppress the noise. The nonlinearity in the high-gain front stage can be compensated by calibration. A chopping-pulse free switched-capacitor low-pass filter follows for variable gain amplification and noise bandwidth limiting. The circuit is designed in a 0.35 mum CMOS process for 50 muV-10 mV bio-potentials with offset up to 100 mV. HSPICE simulations verify that the designed detector achieve the gain of 400 and 4000. The selectable bandwidth is 1kHz for EEG/ECG/EMG or 5 kHz for extra-cellular recording. The design does not require external capacitors. The in-band noise is lower than 58 nV/Hz^0.5. The power consumption of the detector is less than 160 muW. The die area is 0.3 mm times 0.7 mm.