Title :
A neural signal detection amplifier with low-frequency noise suppression
Author :
Yoshida, Takeshi ; Masui, Yoshihiro ; Eki, Ryoji ; Iwata, Atsushi ; Yoshida, Masayuki ; Uematsu, Kazumasa
Author_Institution :
Grad. Sch. of Adv. Sci. of Matter, Hiroshima Univ., Higashi-Hiroshima, Japan
Abstract :
To detect neural spike signals, low-power neural signal detection amplifiers must amplify small neural signals of a few hundred Hz frequency while suppressing large a DC offset voltage, a 1/f noise of MOSFETs, and an induced noise of AC power supply. To overcome the problem of unwanted noise at such a low signal level, a low-noise neural signal detection amplifier with low-frequency noise suppression scheme was developed utilizing a new autozeroing technique. A test chip was designed and fabricated with a mixed signal 0.18 mum CMOS technology. The voltage gain of 36 dB at the bandwidth of the neural signal and the gain reduction of 20 dB at AC supply noise of 60 Hz were obtained. The input equivalent noise and power dissipation were 90 nV/root-Hz and 90 muW at a supply voltage of 1.5 V, respectively.
Keywords :
CMOS integrated circuits; interference suppression; neural chips; signal detection; AC power supply; CMOS technology; DC offset voltage; MOSFET; autozeroing technique; gain 36 dB; low-frequency noise suppression; neural signal detection amplifier; neural spike signals; power 90 muW; power dissipation; size 0.18 mum; voltage 1.5 V; CMOS technology; Frequency; Low-frequency noise; Low-noise amplifiers; MOSFETs; Noise level; Power supplies; Signal detection; Testing; Voltage;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5117835