A reverse-encoding-based on-chip AHB bus tracer supporting both Post-T and Pre-T trace

This demonstration shows how we can enable the SoC debugging and performance evaluation with the reverse-encoding-based on-chip AHB bus tracer. By embedding this bus tracer to a SoC, designers can observe and debug the SoC internal states easily. The bus tracer supports both Pre-Triggering (Pre-T) trace and Post- Triggering (Post-T) trace at high compression ratio. For Post-T trace, designs can monitor signals for a known period at different abstraction level. It is very helpful for designs to realize the top view and detail view of the system for performance evaluation and debugging. Pre-T trace captures signals before an event occurs. It is very helpful for system error diagnosis since the errors are unexpected.