Title :
Managing test complexity through a comprehensive design-to-test strategy
Author :
Kondrat, Michael J.
Author_Institution :
Integrated Meas. Syst. Inc., Beaverton, OR, USA
Abstract :
Advances in design capabilities and process technologies enable semiconductor manufacturers to create increasingly sophisticated, high-speed integrated circuits with test requirements that seriously challenge traditional test methods and manufacturers´ ability to achieve high volume, cost-effective production. To cope with increased test complexity, alternative approaches have largely focused in isolation on design-centric or production-centric tactics, relying in some cases on design-for-test (DFT) methods and in other cases on more powerful automatic test equipment (ATE). Yet approaches to test based solely on such tactics have already fallen behind advances in design and manufacturing, exposing IC manufacturers to the real possibility of creating advanced ICs that cannot be tested within reasonable limits of time or cost. In contrast, a more effective approach targets growing test complexity through a broader strategy that spans product development to facilitate the critical transition from design to production test. At the heart of this strategic approach, test development tools operate within existing design flows, smoothing the traditional barriers between design and test. As a result, logic designers are able to build more testable ICs, and test engineers are able to write more effective test programs. This paper discusses the challenges limiting traditional test methods; describes the requirements for more effective solutions based on a comprehensive design-to-test strategy; and discusses critical technologies needed to deploy effective design-to-test methods required to manage emerging test requirements.
Keywords :
design for testability; high-speed integrated circuits; integrated circuit testing; design-to-test strategy; high-speed integrated circuit; semiconductor manufacturing; test complexity; Circuit testing; Design for testability; Integrated circuit manufacture; Integrated circuit testing; Logic testing; Manufacturing processes; Process design; Production; Semiconductor device manufacture; Semiconductor device testing;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International
Print_ISBN :
0-7803-7301-4
DOI :
10.1109/IEMT.2002.1032779