A Low-Cost Dual-Mode Deinterleaver Design

In this paper, an efficient design of dual mode (de)interleaver for IEEE 802.16 and digital video broadcasting (DVB) standards is presented. According to the proposed distribution pattern, the input data can be split and allocated into separate storage units such that the bit-level block (de)interleaver adopted by IEEE 802.16 can be implemented by multi-bank memory architecture. Furthermore, multiple input data can be grouped together to reduce the memory access frequency such that the single-port memory can be used. Similarly, the multi-bank memory design approach can also be applied for the byte-level convolutional (de)interleaver adopted in DVB system by realizing the multiple delay branches as the circular buffer. Finally, these two different (de)interleaver standards can also be integrated into a single design suitable for those dual-mode consumer communication systems.