• DocumentCode
    2254174
  • Title

    A high speed low power CMOS clock driver using charge recycling technique

  • Author

    Bouras, Ilias ; Liaperdos, Yiannis ; Arapoyanni, Angela

  • Author_Institution
    Inst. of Microelectron., NCSR Demokritos, Greece
  • Volume
    5
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    657
  • Abstract
    This paper presents an Improved Power-Delay Product (PDP) CMOS clock driver based on the charge recycling technique. Two NMOS pass transistors driven by appropriate control signals are used to accomplish the charge recycling procedure. Simulations have shown an up to 18% improvement of PDP over an equivalent conventional CMOS driver
  • Keywords
    CMOS digital integrated circuits; clocks; driver circuits; high-speed integrated circuits; low-power electronics; NMOS pass transistor; charge recycling; circuit simulation; high-speed low-power CMOS clock driver; power-delay product; Capacitance; Capacitors; Clocks; Delay; Driver circuits; Energy consumption; Logic; MOS devices; Power supplies; Recycling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
  • Conference_Location
    Geneva
  • Print_ISBN
    0-7803-5482-6
  • Type

    conf

  • DOI
    10.1109/ISCAS.2000.857552
  • Filename
    857552
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2254174