A millimeter-wave frequency synthesizer architecture with high agility and high resolution performance

In this paper, an approach of developing high agility and resolution millimeter-wave synthesizer architecture without using PLL (Phase Locked Loop) is proposed. Using the frequency multiplying of DDS output signal to provide the local oscillators instead of PLL in traditional three frequency conversions scheme, with good frequency configuration and optimal utilization of DDS (Direct Digital Synthesizer), and high-speed controlling of FPGA (Field Programming Gate Array), the synthesizer implemented with good spectrum purity has excellent performance of both high agility and resolution. The measurement results show that, the millimeter-wave local oscillator´s bandwidth is 160 MHz and the minimum frequency step is 0.931 Hz, the maximum frequency switching time is less than 1 us, the spurious level is better than -60 dBc, the phase noise level is better than -90 dBc/Hz at 1 kHz.