Title :
Performance optimization for high-order continuous-time ΣΔ modulators with extra loop delay
Author :
Luh, L. ; Choma, John, Jr. ; Draper, Jeffrey
Author_Institution :
Univ. of Southern California, Los Angeles, CA, USA
Abstract :
Extra loop delay in a continuous-time modulator can cause a stability problem, especially when the modulator uses a high-order single-loop architecture and operates at a high sampling rate. This paper investigates the impact of extra loop delay on the performance of high-order (single-loop) modulators. A solution to compensate this delay and thereby optimize performance is proposed in this paper. The circuit architecture for this solution is also presented to facilitate a practical realization
Keywords :
circuit optimisation; circuit stability; continuous time systems; delays; sigma-delta modulation; circuit architecture; high-order continuous-time sigma-delta modulators; loop delay; sampling rate; single-loop architecture; stability; Circuits; Clocks; Continuous phase modulation; Delay effects; Delta modulation; Filters; Optimization; Polynomials; Sampling methods; Transfer functions;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.857563
