DocumentCode :
2254428
Title :
Test-point insertion to enhance test compaction for scan designs
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear :
2000
fDate :
2000
Firstpage :
375
Lastpage :
381
Abstract :
Test compaction procedures to reduce the test application time for scan designs terminate when they cannot reduce the test application time without reducing the fault coverage. We propose a procedure for placing observation points that allows higher levels of compaction to be achieved without loss of fault coverage. The observation point values are read only at the last time unit of every test, and therefore, they can be scanned-out at the same time as the next-state values
Keywords :
fault diagnosis; logic testing; fault coverage; logic testing; scan designs; test application time; test compaction; test-point insertion; Application software; Circuit faults; Circuit testing; Cities and towns; Clocks; Compaction; Design engineering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Dependable Systems and Networks, 2000. DSN 2000. Proceedings International Conference on
Conference_Location :
New York, NY
Print_ISBN :
0-7695-0707-7
Type :
conf
DOI :
10.1109/ICDSN.2000.857564
Filename :
857564
Link To Document :
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