DocumentCode :
2254560
Title :
The interlaced carry-arrest adder
Author :
Fam, Adly T.
Author_Institution :
Dept. of Electr. Eng., State Univ. of New York at Buffalo, Buffalo, NY, USA
fYear :
2010
fDate :
19-22 Dec. 2010
Firstpage :
120
Lastpage :
123
Abstract :
The interlaced carry-arrest adder (ICA) is introduced as a new, fast multioperand adder to compute the sum of four or more numbers. To avoid the need to propagate the carry all the way to the most significant bits, periodic gaps of zeros are created in each of the summands by moving certain pattern of their bits into auxiliary arrays. The pattern of the moved bits is staggered, such that the auxiliary arrays are filled without overlaps and with a periodic pattern of gaps left unfilled such that the resulting auxiliary numbers also have the same staggered zero patterns as the summands. These gaps convert a sum of numbers with arbitrarily large number of bits to independent parallel additions of short pairs of numbers. This is so since any carry bits resulting from the addition of pairs of short numbers are trapped in the gaps. This allows for fast parallel addition that is truly independent of the number of bits of the summands, and depend only on the number of bits in the short numbers added in parallel, and logarithmically on the number of numbers to be added.
Keywords :
adders; parallel processing; ICA; auxiliary arrays; auxiliary numbers; fast multioperand adder; fast parallel addition; independent parallel additions; interlaced carry-arrest adder; periodic pattern; staggered zero patterns; Adders; Digital arithmetic; Equations; Logic circuits; Mathematical model; Nickel; Patents; Multioperand Interlaced Carry-Arrest Adder; Multiplication; Parallel Computing; Partial Sums; Sums;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics (ICM), 2010 International Conference on
Conference_Location :
Cairo
Print_ISBN :
978-1-61284-149-6
Type :
conf
DOI :
10.1109/ICM.2010.5696088
Filename :
5696088
Link To Document :
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