Title :
Design and evaluation of high-speed energy-aware carry skip adders
Author :
De Rose, Raffaele ; Lanuzza, Marco ; Frustaci, Fabio
Author_Institution :
Dept. of Electron., Comput. Sci. & Syst., Univ. of Calabria, Rende, Italy
Abstract :
In this paper, the impact of different dynamic logic design styles is evaluated considering as benchmark a fast carry-skip adder. Four different adder designs were implemented in standard domino, footless domino, data driven dynamic, and dynamic hybrid (standard domino + data driven dynamic) logic design styles, by exploiting the STMicroelectronics 45nm 1V CMOS technology. When applied to a 32-bit carry-skip adder, the data driven dynamic approach assures an energy-delay product 29%, 33% and 39% lower than the standard domino, footless domino, and dynamic hybrid implementations, respectively.
Keywords :
CMOS integrated circuits; adders; carry logic; logic design; CMOS technology; data driven dynamic logic design; dynamic hybrid logic design; energy-delay product; footless domino logic design; high-speed energy-aware carry skip adder; standard domino logic design; Adders; Capacitance; Clocks; Delay; Logic design; Logic gates; Transistors;
Conference_Titel :
Microelectronics (ICM), 2010 International Conference on
Conference_Location :
Cairo
Print_ISBN :
978-1-61284-149-6
DOI :
10.1109/ICM.2010.5696089
