• DocumentCode
    2254586
  • Title

    Implementation of a global clocking scheme for ULP radio networks

  • Author

    Wang, Xiao Y. ; Dokania, Rajeev K. ; Apsel, Alyssa B.

  • Author_Institution
    Cornell Univ., Ithaca, NY, USA
  • fYear
    2009
  • fDate
    24-27 May 2009
  • Firstpage
    912
  • Lastpage
    915
  • Abstract
    In this paper we demonstrate the first 3-node synchronization of on-chip CMOS impulse radios. The synchronization scheme presented here is fast, scalable, low jitter and facilitates aggressive duty-cycling. We show experimentally that in steady state, the nodes are synchronized with cycle-to-cycle jitter of 1% of the period.
  • Keywords
    CMOS integrated circuits; synchronisation; ultra wideband communication; 3-node synchronization; ULP radio networks; cycle-to-cycle jitter; global clocking scheme; on-chip CMOS impulse radios; Clocks; Frequency synchronization; Jitter; Pulse circuits; Radio frequency; Radio network; Receivers; Switching circuits; Transceivers; Wireless sensor networks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3827-3
  • Electronic_ISBN
    978-1-4244-3828-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2009.5117905
  • Filename
    5117905
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2254586