DocumentCode :
2254777
Title :
Techniques for area-time efficient image rotation
Author :
Satzoda, R.K. ; Suchitra, S. ; Srikanthan, T.
Author_Institution :
Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore, Singapore
fYear :
2009
fDate :
24-27 May 2009
Firstpage :
940
Lastpage :
943
Abstract :
Real-time image rotation is a necessary task in many vision based applications. Most available image rotation architectures are serial in nature, while the existing parallel techniques suffer from computational bottlenecks, limiting their performance. In this paper, we propose techniques that not only speed up the rotation process but also reduce area, yielding an area-time efficient architecture. They exploit properties of symmetry in image coordinates for parallel image rotation. We show that the number of computations, the total computation time and area cost of the proposed architecture are lesser by as much as 80%, 55% and 67% respectively when compared to the most efficient parallel architecture in recent literature.
Keywords :
image processing; parallel architectures; area-time efficient image rotation; computational bottlenecks; image rotation architectures; parallel architecture; parallel techniques; Computer architecture; Concurrent computing; Costs; Delay; Embedded system; Engines; Equations; Pixel; Table lookup; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
Type :
conf
DOI :
10.1109/ISCAS.2009.5117912
Filename :
5117912
Link To Document :
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