DocumentCode :
22552
Title :
Single-Ended CMOS Doherty Power Amplifier Using Current Boosting Technique
Author :
Joon Hyung Kim ; Hyuk Su Son ; Woo Young Kim ; Chul Soon Park
Author_Institution :
Korea Design Center, Seongnam, South Korea
Volume :
24
Issue :
5
fYear :
2014
fDate :
May-14
Firstpage :
342
Lastpage :
344
Abstract :
In this letter, an efficiency enhancement technique incorporating a gate-voltage boosting of a peaking power amplifier (PA) in a CMOS Doherty PA is presented. To compensate the current driving capability from the low dc bias point of the peaking cell, an auxiliary bias network consisting of an operational amplifier (OPA) is utilized to provide the corresponding gate voltage in accordance with an instantaneous output power level. To verify the superior performance of the proposed technique, a CMOS Doherty PA with a prototype OPA has been fabricated using a commercial 0.18 μm process. The experimental results show that the implemented PA has an overall efficiency of 43.6% and a gain of 27.2 dB at an average output power of 25.2 dBm for a 10 MHz 3G LTE signal with a 7.6 dB peak-to-average power ratio (PAPR). Under this situation, the spectral performance is -34.1 dBc.
Keywords :
CMOS integrated circuits; operational amplifiers; power amplifiers; 3G LTE signal; CMOS Doherty PA; OPA; auxiliary bias network; current boosting technique; efficiency 43.6 percent; efficiency enhancement technique; frequency 10 MHz; gain 27.2 dB; gate-voltage boosting; instantaneous output power level; operational amplifier; peaking cell; peaking power amplifier; size 0.18 mum; Boosting; CMOS integrated circuits; Gain; Linearity; Logic gates; Peak to average power ratio; Power generation; CMOS; Doherty amplifier; power added efficiency (PAE); power amplifier (PA);
fLanguage :
English
Journal_Title :
Microwave and Wireless Components Letters, IEEE
Publisher :
ieee
ISSN :
1531-1309
Type :
jour
DOI :
10.1109/LMWC.2014.2309078
Filename :
6758399
Link To Document :
بازگشت