DocumentCode
2255717
Title
Verifying UML/OCL models using Boolean satisfiability
Author
Soeken, Mathias ; Wille, Robert ; Kuhlmann, Mirco ; Gogolla, Martin ; Drechsler, Rolf
Author_Institution
Group for Comput. Archit., Univ. of Bremen, Bremen, Germany
fYear
2010
fDate
8-12 March 2010
Firstpage
1341
Lastpage
1344
Abstract
Nowadays, modeling languages like UML are essential in the design of complex software systems and also start to enter the domain of hardware and hardware/software codesign. Due to shortening time-to-market demands, ??first time right?? requirements have thereby to be satisfied. In this paper, we propose an approach that makes use of Boolean satisfiability for verifying UML/OCL models. We describe how the respective components of a verification problem, namely system states of a UML model, OCL constraints, and the actual verification task, can be encoded and afterwards automatically solved using an off-the-shelf SAT solver. Experiments show that our approach can solve verification tasks significantly faster than previous methods while still supporting a large variety of UML/OCL constructs.
Keywords
Boolean functions; Unified Modeling Language; hardware-software codesign; program verification; simulation languages; Boolean satisfiability; OCL models; UML models; complex software systems; hardware software codesign; modeling languages; off-the-shelf SAT solver; time-to-market demands; verification tasks; Application software; Computer architecture; Concrete; Database systems; Hardware; Logic; Software design; Software systems; Time to market; Unified modeling language;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5457017
Filename
5457017
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