Hot-carrier induced degradation and recovery in polysilicon-emitter bipolar transistors

We have studied in detail the hot-carrier induced degradation in polysilicon-emitter NPN bipolar junction transistors (BJTs) with different emitter geometries. Our results confirm that the oxide/silicon interface traps generated by electrical stressing, are located in the same region as those present in unstressed devices - around the emitter perimeter. We also believe that positive charged defects are generated by the hot-carrier stressing, and that these trapped charges may be involved in the stress recovery at short times with lower activation energies. Reversible changes in the reverse bias stress current were observed especially at low reverse bias. This is possibly connected with the creation of interface/midgap states which can be involved in trap-assisted tunneling, both in reverse and forward bias. Hot-carrier induced degradation occurs in our devices mainly in the base-emitter (BE) but also in the base-collector (BC) diodes. This, we think, is related to the presence of field oxide in the BC region that has allowed hot holes to create trapped charge.