Title :
A single-slope 80MS/s ADC using Two-Step Time-to-Digital Conversion
Author :
Park, Min ; Perrott, Michael H.
Author_Institution :
Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
An 80 MS/s analog-to-digital converter (ADC) based on single-slope conversion is presented which utilizes a recently developed gated ring oscillator (GRO) time-to-digital converter (TDC) to achieve an ENOB of 6.45 bits. To save power, the time-to-digital conversion is done in two steps, the first of which is based on coarse time quantization as measured by cycles of an oscillator and the second of which is based on fine time quantization by the GRO TDC. The resulting 0.13 mum CMOS prototype circuit is simple and compact in its implementation and consumes 6.4 mW of power.
Keywords :
CMOS integrated circuits; analogue-digital conversion; logic design; oscillators; CMOS prototype circuit; analog-to-digital converter; coarse time quantization; fine time quantization; gated ring oscillator; power 6.4 mW; single-slope conversion; size 0.13 mum; time-to-digital converter; Analog-digital conversion; Counting circuits; Performance evaluation; Power measurement; Prototypes; Quantization; Ring oscillators; Threshold voltage; Time measurement; Voltage-controlled oscillators;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5117958
