Analysis of Booth encoding efficiency in parallel multipliers using compressors for reduction of partial products

The Booth encoding method is evaluated. Although generally, used in parallel multipliers, the authors show this scheme to be obsolete due to the improvements in bit compression trees. The number of gate levels with and without Booth encoding is compared when 4:2 compressors are used. It was found that a single row of 4:2 compressors reduces the number of partial products to one half which is the essential function of the Booth encoding technique. the authors have found that a single row of 4:2 compressors achieves this reduction in less time and with fewer gates used. The case of 2´s complement representation is discussed