DocumentCode
2256679
Title
ASIC Implementation of Cairo University SPARC “CUSPARC” embedded processor
Author
Suleiman, Amr A Z ; Khedr, Alhassan F. ; Habib, S. E -D
Author_Institution
Electron. & Commun. Dept., Cairo Univ., Cairo, Egypt
fYear
2010
fDate
19-22 Dec. 2010
Firstpage
439
Lastpage
442
Abstract
Cairo University SPARC “CUSPARC” processor is an IP embedded processor core conforming to SPARC V8 ISA. CUSPARC is fully developed at Cairo University and is the first Egyptian processor. In this paper, the ASIC Implementation and Verification of the CUSPARC processor is described at 130nm technology node. CUSPARC scores a typical clock frequency of 260MHz, power dissipation of 0.11 mW/MHz and power Efficiency of 8.78 DMIPS/mW, which makes it very suitable for embedded and real-time systems.
Keywords
CMOS digital integrated circuits; application specific integrated circuits; embedded systems; low-power electronics; microprocessor chips; reduced instruction set computing; ASIC implementation; CUSPARC; Cairo University SPARC; Egyptian processor; IP embedded processor core; SPARC V8 ISA; clock frequency; power dissipation; power efficiency; size 130 nm; Application specific integrated circuits; CMOS technology; IP networks; Layout; Process control; Random access memory; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics (ICM), 2010 International Conference on
Conference_Location
Cairo
Print_ISBN
978-1-61284-149-6
Type
conf
DOI
10.1109/ICM.2010.5696182
Filename
5696182
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