ZigBee-compliant fully-integrated delta-sigma analog-to-digital converters implement in 0.25 um CMOS process

Analog-to-digital converter designs are considerably becoming critical parts of wireless receiver improvement studies. Delta-sigma ADCs, which offer high-resolution, low cost and low power benefits are tested for aptness for the ZigBee standard - an emerging standard developed to address the needs of wireless sensing and control based on IEEE 802.15.4. Eight fully integrated delta-sigma analog-to-digital converters in 0.25 mum digital CMOS process are presented. The following analog modulator topologies are used: single-ended continuous-time (SECT), single-ended discrete-time (SEDT), fully-differential continuous-time (FDCT), and fully-differential discrete-time (FDDT). For each topology, two digital filters are designed. The converters employ a first-order single-bit delta-sigma conversion. Specifications matched for suitability in ZigBee receivers include data rate, effective number of bits, oversampling ratio, and power consumption.