Improved low-distortion ΔΣ ADC topology

Architectural considerations for DeltaSigma modulator ADC are critical to achieve wideband and low-power data conversion. A low-distortion single-loop DeltaSigma modulator provides improved performance, and allows robust performance insensitive to circuit errors. However, it requires multiple signal summation at the input of the quantizer, and suffers from reduced signal processing time available for DAC linearization. It is also difficult to incorporate double sampling in the low-distortion modulator. This paper suggests an improved low-distortion modulator topology, derived by signal flow graph manipulations, to overcome these limitations.