Title :
Design optimization of multi-barrier tunneling devices using the transfer-matrix method
Author :
Gehring, A. ; Grasser, Tibor ; Selberherr, S.
Author_Institution :
Inst. fur Microelectron., Technische Univ. Wien, Austria
Abstract :
The purpose of this paper is to investigate the effects of device design related issues on the performance of phase-state low electron transistor (PLEDTR)-based memory cells. The authors consider the tunneling model and simulation results for multi-barrier tunneling devices using the transfer-matrix method
Keywords :
MOS memory circuits; MOSFET; integrated circuit design; integrated circuit modelling; semiconductor device models; transfer function matrices; tunnelling; MOSFET; PLEDTR-based memory cells; design optimization; device design; multi-barrier tunneling devices; phase-state low electron transistor; simulation; transfer-matrix method; tunneling model; Design optimization; Diodes; Electron devices; Energy barrier; Insulation; MOSFET circuits; Microelectronics; Resonant tunneling devices; Shape; Silicon;
Conference_Titel :
Semiconductor Device Research Symposium, 2001 International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-7432-0
DOI :
10.1109/ISDRS.2001.984490
