DocumentCode
2257099
Title
Formal specification of networks-on-chips: deadlock and evacuation
Author
Verbeek, Freek ; Schmaltz, Julien
Author_Institution
Inst. for Comput. & Inf. Sci., Radboud Univ. Nijmegen, Nijmegen, Netherlands
fYear
2010
fDate
8-12 March 2010
Firstpage
1701
Lastpage
1706
Abstract
Networks-on-chips (NoC) are emerging as a promising interconnect solution for efficient Multi-Processors Systems-on-Chips. We propose a methodology that supports the specification of parametric NoCs. We provide sufficient constraints that ensure deadlock-free routing, functional correctness, and liveness of the design. To illustrate our method, we discharge these constraints for a parametric NoC inspired by the HERMES architecture.
Keywords
formal specification; integrated circuit design; multiprocessing systems; network-on-chip; HERMES architecture; deadlock-free routing; formal specification; multiprocessors systems-on-chips; networks-on-chips; Computer networks; Computer science; Concrete; Constraint theory; Electronic mail; Formal specifications; Network-on-a-chip; Routing; Switches; System recovery;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5457089
Filename
5457089
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