• DocumentCode
    2257119
  • Title

    A wide-tuning-range and reduced-fractional-spurs synthesizer combining Σ-Δ fractional-N and integer Flying-Adder techniques

  • Author

    Huang, Chen-Wei ; Gui, Ping ; Xiu, Liming

  • Author_Institution
    Dept. of Electr. Eng., Southern Methodist Univ., Dallas, TX, USA
  • fYear
    2009
  • fDate
    24-27 May 2009
  • Firstpage
    1377
  • Lastpage
    1380
  • Abstract
    A frequency synthesizer architecture with a wide tuning range and reduced fractional spurs is presented. The proposed topology includes a Sigma-Delta fractional-N synthesizer and an integer flying-adder architecture. Compared to the conventional Sigma-Delta fractional-N frequency synthesizer, this approach has much wider tuning range. Compared to the fractional flying-adder frequency synthesizer, the proposed approach can achieve the same frequency resolution with reduced fractional spurs and alleviates the constraints on the adder design in the flying-adder architecture.
  • Keywords
    adders; frequency synthesizers; SigmaDelta fractional-N synthesizer; frequency synthesizer architecture; integer flying-adder techniques; reduced-fractional-spurs synthesizer; wide-tuning-range; Adders; Circuit synthesis; Clocks; Frequency control; Frequency synthesizers; Phase locked loops; Signal resolution; Signal synthesis; Tuning; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3827-3
  • Electronic_ISBN
    978-1-4244-3828-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2009.5118021
  • Filename
    5118021