DocumentCode
2257287
Title
Fast FPGA prototyping of a multipath fading channel emulator via high-level design
Author
Hwang, Jeng-Kuang ; Lin, Kuei-Horng ; Li, Jeng-Da ; Deng, Juinn-Horng
Author_Institution
Yuan-Ze Univ., Chungli
fYear
2007
fDate
17-19 Oct. 2007
Firstpage
168
Lastpage
171
Abstract
A baseband multipath fading channel emulator is implemented on Xilinx XtremeDSP FPGA platform through high-level design. Without any RTL coding, fast prototyping of important modules can be done in the form of high-level Simulink models and Xilinx System Generator IP blocks. These modules include the white Gaussian noise generator (WGNG), Doppler filter, direct digital frequency synthesizer (DDFS), multi-rate interpolators, and multipath signal generator. Since all modules are designed in high level, the system parameters and configuration can be easily changed as desired. The FPGA emulator have been tested at a sampling rate of 30 Msps, and all the measured signals are well coincides with the simulation results, thus verifying the correctness of the design.
Keywords
fading channels; field programmable gate arrays; logic design; multipath channels; FPGA emulator; Simulink model; Xilinx system generator; field programmable gate array; high-level design; multipath fading channel emulator; Baseband; Digital filters; Fading; Field programmable gate arrays; Frequency synthesizers; Gaussian noise; Prototypes; Sampling methods; Signal generators; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Information Technologies, 2007. ISCIT '07. International Symposium on
Conference_Location
Sydney,. NSW
Print_ISBN
978-1-4244-0976-1
Electronic_ISBN
978-1-4244-0977-8
Type
conf
DOI
10.1109/ISCIT.2007.4392006
Filename
4392006
Link To Document