DocumentCode :
2257361
Title :
A new quaternary FPGA based on a voltage-mode multi-valued circuit
Author :
Lazzari, Cristiano ; Flores, Paulo ; Monteiro, José ; Carro, Luigi
Author_Institution :
INESC-ID, Lisbon, Portugal
fYear :
2010
fDate :
8-12 March 2010
Firstpage :
1797
Lastpage :
1802
Abstract :
FPGA structures are widely used due to early time-to-market and reduced non-recurring engineering costs in comparison to ASIC designs. Interconnections play a crucial role in modern FPGAs, because they dominate delay, power and area. Multiple-valued logic allows the reduction of the number of signals in the circuit, hence can serve as a mean to effectively curtail the impact of interconnections. In this work we propose a new FPGA structure based on a low-power quaternary voltage-mode device. The most important characteristics of the proposed architecture are the reduced fanout, low number of wires and switches, and the small wire length. We use a set of FIR filters as a demonstrator of the benefits of the quaternary representation in FPGAs. Results show a significant reduction on power consumption with small timing penalties.
Keywords :
FIR filters; field programmable gate arrays; logic design; low-power electronics; multivalued logic circuits; FIR filter; low-power quaternary voltage-mode device; quaternary FPGA; voltage-mode multivalued circuit; Application specific integrated circuits; Costs; Delay; Design engineering; Field programmable gate arrays; Integrated circuit interconnections; Logic devices; Power engineering and energy; Time to market; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location :
Dresden
ISSN :
1530-1591
Print_ISBN :
978-1-4244-7054-9
Type :
conf
DOI :
10.1109/DATE.2010.5457105
Filename :
5457105
Link To Document :
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