• DocumentCode
    2257763
  • Title

    A new 1T DRAM cell with enhanced floating body effect

  • Author

    Lin, Jyi-Tsong ; Chang, Mike

  • Author_Institution
    Dept. of Electr. Eng., Nat. Sun Yat Sen Univ., Kaohsiung
  • fYear
    2006
  • fDate
    2-4 Aug. 2006
  • Abstract
    Recently the semiconductor industry tends to develop a smaller volume device and system with lower power consumption, lower leakage current, and high speed performance. SOI technology has many unique characteristics, which is one of the most promising methods to the direction. As the semiconductor memory is concerned, the 1T-DRAM cell realized by the concept of floating body effect in a PD-SOI nMOSFET can allow the DRAM cell to be scaled down in depth with less area occupied. In this paper, we propose a new structure of 1T-DRAM cell, which has bottom buried oxide with the sidewall block oxide around its body, which can suppress the leakage current between the S/D and the body of the cell. In addition it can also improve the programming window of the 1T-DRAM cell more than 39% by utilizing its own structural characteristic
  • Keywords
    DRAM chips; MOS memory circuits; leakage currents; low-power electronics; silicon-on-insulator; 1T DRAM cell; PD-SOI nMOSFET; SOI technology; floating body effect; leakage current; programming window; semiconductor memory; Capacitors; Electronic mail; Electronics industry; Energy consumption; Impact ionization; Leakage current; MOSFET circuits; Random access memory; Semiconductor memory; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Technology, Design, and Testing, 2006. MTDT '06. 2006 IEEE International Workshop on
  • Conference_Location
    Taipei
  • ISSN
    1087-4852
  • Print_ISBN
    0-7695-2572-5
  • Type

    conf

  • DOI
    10.1109/MTDT.2006.6
  • Filename
    1654576