DocumentCode :
2258120
Title :
Hardware-software co-designing benchmark-driven superpipelined instruction set processors
Author :
Su, Ching-Long ; Despain, Alvin M.
Author_Institution :
Lab. of Adv. Comput. Archit., Univ. of Southern California, Los Angeles, CA, USA
fYear :
1994
fDate :
9-11 Nov 1994
Firstpage :
319
Abstract :
This paper focuses on the issues of designing an optimal superpipelined ISP (instruction set processor) driven by a set of benchmark programs. Most issues discussed in this paper also apply to VLIW and superscalar processors
Keywords :
instruction sets; parallel architectures; performance evaluation; pipeline processing; systems analysis; VLIW; benchmark programs; benchmark-driven; hardware-software co-design; optimal superpipelined ISP; superpipelined instruction set processors; superscalar processors; Application software; Circuits; Latches; Parallel processing; Pipelines; Program processors; Routing; Scheduling; Silicon; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Software and Applications Conference, 1994. COMPSAC 94. Proceedings., Eighteenth Annual International
Conference_Location :
Taipei
Print_ISBN :
0-8186-6705-2
Type :
conf
DOI :
10.1109/CMPSAC.1994.342785
Filename :
342785
Link To Document :
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