Linearity enhancement of oversampled pipeline A/D converters using sigma-delta modulation

In pipeline analog-to-digital converters (ADCs), mismatches in the fabricated components limit their linearity. This paper describes a mismatch shaping technique that significantly mitigates this problem in pipeline ADCs with low oversampling ratio. The use of a sigma-delta coder results in a beneficial noise shaping of the in-band distortion introduced by capacitor mismatches. As a simulation example, the proposed technique is applied to a pipeline ADC with a nominal accuracy of 14 bits. Through this example, the paper demonstrates that, in the presence of component matching limitations, the technique can improve the ADC linearity without appreciable hardware complexity.