DocumentCode :
2258461
Title :
High resistivity SOI substrates: how high should we go?
Author :
Lederer, D. ; Desrumeaux, C. ; Brunier, Franqois ; Raskin, J.P.
Author_Institution :
Microwave Lab., UCL, Louvain, Belgium
fYear :
2003
fDate :
29 Sept.-2 Oct. 2003
Firstpage :
50
Lastpage :
51
Abstract :
For planar RF structures made on oxidized High Resistivity (HR) Si substrates, it is fundamental to keep the resistivity near the SiO2/HR Si interface as high as possible. This paper presents a quantitative analysis of the influence of interface states at the SiO2/Si contact on the substrate resistivity. The starting materials for this study are raw HR substrates before or after SOI bonding process. These HR Si wafers were fabricated with either a Low (LIO) or a High Interstitial Oxygen (HIO) concentration.
Keywords :
coplanar waveguides; electrical resistivity; elemental semiconductors; interface states; interstitials; silicon-on-insulator; substrates; SiO2-Si; SiO2-Si contact; coplanar waveguides; high resistivity SOI substrates; interface states; interstitial O; planar RF structures; substrate resistivity; Conductivity; Coplanar waveguides; Interface phenomena; Silicon on insulator technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 2003. IEEE International
ISSN :
1078-621X
Print_ISBN :
0-7803-7815-6
Type :
conf
DOI :
10.1109/SOI.2003.1242893
Filename :
1242893
Link To Document :
بازگشت