High temperature DC characterization of fully-depleted 0.5 μm SOS-CMOS MOSFETs for analog circuit design

Author

Ericson, M.N. ; Britton, C.L. ; Rochelle, J.M. ; Blalock, B.J. ; Williamson, B.D. ; Greenwell, R.L. ; Schultz, R.

Author_Institution

Oak Ridge Nat. Lab., TN, USA

fYear

2003

fDate

29 Sept.-2 Oct. 2003

Firstpage

89

Lastpage

91

Abstract

Extensive characterization results of MOSFET small-signal parameters over temperature (25° to 300°C) are presented for low-V_T transistors fabricated in a SOS 0.5-μm process. Low-V_T devices such as these are particularly useful for low-voltage, low-power (LVLP) analog applications. Small-signal dc parameters critical in analog circuit design are reported including device transconductance efficiency (g_m/I_d), output resistance (r_ds), and threshold voltage (V_T). These parameters are summarized as a function of both gate length (0.5 μm to 16 μm) and temperature. Inversion coefficient representation is employed for data presentation and analysis. This work provides the most thorough presentation of SOS MOSFET dc parameters as a function of both gate length and temperature to date. In addition, this work summarizes device information essential for successful high-temperature SOS-CMOS analog circuit design.

Keywords

CMOS analogue integrated circuits; MOSFET; high-temperature electronics; integrated circuit design; 0.5 to 16 micron; 25 to 300 degC; SOS-CMOS MOSFET; analog circuit design; device transconductance efficiency; gate length; high temperature dc characterization; inversion coefficient; low power analog applications; low voltage transistors; output resistance; small signal dc parameters; small signal parameters; threshold voltage; CMOS analog integrated circuits; Integrated circuit design; MOSFETs;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2003. IEEE International

ISSN

1078-621X

Print_ISBN

0-7803-7815-6

Type

conf

DOI

10.1109/SOI.2003.1242911

Filename

1242911