DocumentCode
2259018
Title
Scaled front-side and back-side trapping SONOS memories on SOI
Author
Silva, H. ; Kim, M.K. ; Kim, C.W. ; Tiwar, S.
Author_Institution
Sch. of Appl. & Eng. Phys., Cornell Univ., Ithaca, NY, USA
fYear
2003
fDate
29 Sept.-2 Oct. 2003
Firstpage
105
Lastpage
106
Abstract
We report results on ultra-short channel front-side trapping SONOS (silicon-oxide-nitride-oxide-silicon) memories and on a new back-side trapping memory, obtained by the creation of a complex SOI substrate. Front-side trapping SONOS memories show useful and reproducible memory characteristics down to 46 nm gate length. The back-side trapping memory device has potentially unique properties since it is both a scalable memory and a scalable SOI transistor.
Keywords
elemental semiconductors; integrated memory circuits; semiconductor-insulator-semiconductor devices; silicon-on-insulator; SOI transistor; Si; back-side trapping memory device; silicon-oxide-nitride-oxide-silicon memories; ultra-short channel front-side trapping; Semiconductor memories; Semiconductor-insulator-semiconductor devices; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2003. IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-7815-6
Type
conf
DOI
10.1109/SOI.2003.1242917
Filename
1242917
Link To Document