DocumentCode
2259073
Title
Implementing digital logic with sinusoidal supplies
Author
Bollapalli, Kalyana C. ; Khatri, Sunil P. ; Kish, Laszlo B.
Author_Institution
Dept. of ECE, Texas A&M Univ., College Station, TX, USA
fYear
2010
fDate
8-12 March 2010
Firstpage
315
Lastpage
318
Abstract
In this paper, a new type of combinational logic circuit realization is presented. Logic values are implemented as sinusoidal signals. Sinusoidal signals of the same frequency are phase shifted by ?? to destructively interfere with each other, and represent the logic 0 and 1 values of Boolean Logic. These properties of sinusoids can be used to identify a signal without ambiguity. Thus, representing logic values as sinusoidal signals yields a realizable system of logic. The paper presents a logic gate family that can operate using the sinusoidal signals for logic 0 and logic 1 values. Due to orthogonality of sinusoid signals with different frequencies, multiple sinusoids could be transmitted on a single wire. This provides a natural way of implementing multilevel logic. Signals traveling long distances could take advantage of this fact and can share interconnect lines. Recent research in circuit design has made it possible to harvest sinusoidal signals of the same frequency and 180?? phase difference from a single resonant clock ring in a distributed manner. Other advantage of such a logic family is its immunity from external additive noise. The experiments in this paper indicate that this paradigm, when used to implement binary valued logic, yields an improvement in switching (dynamic) power.
Keywords
Boolean algebra; combinational circuits; integrated circuit design; integrated circuit interconnections; logic circuits; logic design; Boolean logic; additive noise; binary valued logic; circuit design; combinational logic circuit realization; digital logic; interconnect lines; logic gate family; multilevel logic; sinusoidal signals; sinusoidal supplies; Boolean functions; Circuit synthesis; Clocks; Combinational circuits; Frequency; Integrated circuit interconnections; Logic gates; Resonance; Signal processing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5457188
Filename
5457188
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