A low-complexity hardware implementation of discrete-time frequency-selective Rayleigh fading channels

A low-complexity hardware implementation method is proposed for discrete-time frequency-selective Rayleigh fading channels. The proposed method first employs the sum-of-sinusoids method to generate multiple independent flat fading channel responses, then utilizes a simple weight-delay-sum filtering method to incorporate the fractionally-delayed multipath rays into inter-tap correlated tap gains. It thus achieves accurate correlation properties in both inter-tap correlation and temporal correlation (or Doppler spectrum). The proposed method is implemented by an Altera Stratix II FPGA development kit and the results show excellent performance match with those by Matlab software simulations.