A power dissipation comparison of ALU-architectures for ASIPs

Author

Kalyanaraman, Vijayakumar ; Mueller, Matthias ; Simon, Sven ; Steinert, Mario ; Gryska, Holger

Author_Institution

Inst. of Inf. & Autom., Hochschule Bremen, Germany

Volume

2

fYear

2005

fDate

28 Aug.-2 Sept. 2005

Abstract

This paper focuses on the implementation of different ALU architectures for ASIPs with greater emphasis on the reduction of power dissipation. The examinations are based on a workframe for the design of fully configurable ASIP with proper selection of power efficient ALU architectures for the implementation of digital filters. Architectures with high ALU complexity and low ALU access rate are compared against architectures with low ALU complexity and high ALU access rate to find out the one that provides a better power efficiency. More in detail, we discuss the reduction of the power dissipation by choosing optimized ALU architectures for the implementation of digital filters.

Keywords

application specific integrated circuits; digital arithmetic; digital filters; instruction sets; microcomputers; power consumption; programmable logic devices; application specific processor; arithmetic logic unit; digital filter; instruction set processor; power dissipation reduction; Application specific processors; Arithmetic; Circuits; Design optimization; Digital filters; IIR filters; Lattices; Power dissipation; Resource management; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on

Print_ISBN

0-7803-9066-0

Type

conf

DOI

10.1109/ECCTD.2005.1523032

Filename

1523032