DocumentCode
2259143
Title
Control of threshold voltage and short channel effects in ultra-thin strained-SOI CMOS
Author
Numata, Toshinori ; Mizuno, Tomohisa ; Tezuka, Tsutomu ; Koga, Junji ; Takagi, Shin-ichi
Author_Institution
MIRAI, Assoc. of Super-Adv. Electron. Technol., Kawasaki, Japan
fYear
2003
fDate
29 Sept.-2 Oct. 2003
Firstpage
119
Lastpage
121
Abstract
In this paper threshold voltage, subthreshold slope and short channel effects, in strained-SOI n-MOSFET and p-MOSFET are examined quantitatively, with emphasis on the impact of band offset in Si/SiGe heterostructure, by two dimensional device simulation.
Keywords
CMOS integrated circuits; Ge-Si alloys; MOSFET; elemental semiconductors; semiconductor device models; semiconductor thin films; silicon; silicon-on-insulator; Si-SiGe; Si/SiGe heterostructure; band offset; short channel effects; strained-SOI n-MOSFET; strained-SOI p-MOSFET; subthreshold slope; threshold voltage; two dimensional device simulation; ultrathin strained-SOI CMOS; CMOS integrated circuits; Germanium alloys; MOSFETs; Semiconductor device modeling; Semiconductor films; Silicon; Silicon alloys; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2003. IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-7815-6
Type
conf
DOI
10.1109/SOI.2003.1242922
Filename
1242922
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