DocumentCode
2259255
Title
CMOL: possible hybrid semiconductor/nanodevice circuits
Author
Likharev, Konstantin K.
Author_Institution
Stony Brook Univ., NY, USA
Volume
2
fYear
2005
fDate
28 Aug.-2 Sept. 2005
Abstract
The author reviews the recent work on devices and architectures for possible hybrid semiconductor/nanodevice integrated circuits of "CMOL" variety. Such circuit would combine an advanced CMOS subsystem fabricated by the usual lithographic patterning with a two-layer nanowire crossbar (formed, e.g., by nanoimprinting) with the wires connected, at each crosspoint, by two-terminal nanodevices. The CMOL concept enables a combination of the advantages of its components (e.g., reliability of MOSFET transistors and minuscule footprint of nanodevices), as well as those of patterning techniques: the flexibility of the optical lithography and the potentially low cost of nanoimprinting and nanodevice formation (e.g., the chemically-directed molecular self-assembly). This powerful combination may allow CMOL circuits to reach an unparalleled device density (up to 1012 functions per cm2) and ultrahigh information processing performance (up to 1020 operations per second per cm2), at acceptable power dissipation (below 100 W/cm2) in several digital and mixed-signal systems including terabit-scale memories, reconfigurable FPGA-like logic circuits, and neuromorphic networks. The main challenges on the way toward practical CMOL systems is the fabrication of highly reproducible nanodevices and the improvement of CMOL circuit architectures.
Keywords
CMOS integrated circuits; hybrid integrated circuits; nanoelectronics; nanopatterning; CMOL; FPGA-like logic circuit; MOSFET transistor; chemically-directed molecular self-assembly; hybrid circuit; lithographic patterning; nanodevice circuit; nanodevice formation; nanoimprinting; nanowire crossbar; neuromorphic network; optical lithography; semiconductor circuit; Chemicals; Costs; Hybrid integrated circuits; Lithography; MOSFET circuits; Nanoscale devices; Optical devices; Self-assembly; Transistors; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on
Print_ISBN
0-7803-9066-0
Type
conf
DOI
10.1109/ECCTD.2005.1523037
Filename
1523037
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