• DocumentCode
    2259456
  • Title

    Anomalous history behavior in stacked PD SOI gates

  • Author

    Ketchen, Mark B. ; Bhushan, Manjul

  • Author_Institution
    IBM Res., Yorktown Heights, NY, USA
  • fYear
    2003
  • fDate
    29 Sept.-2 Oct. 2003
  • Firstpage
    168
  • Lastpage
    169
  • Abstract
    In this article described a new experiment with multiple input stacked gates in which delays can be over 7% outside the 1SW/2SW range. This result, which is not predicted by models, is thought to be either a floating body SOI effect or related to traps in the gate oxide and would be present in bulk as well.
  • Keywords
    CMOS logic circuits; history; logic gates; silicon-on-insulator; switching; CMOS gate; SOI gate; gate oxide; gate switching; history; CMOSFET logic devices; History; Silicon on insulator technology; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 2003. IEEE International
  • ISSN
    1078-621X
  • Print_ISBN
    0-7803-7815-6
  • Type

    conf

  • DOI
    10.1109/SOI.2003.1242939
  • Filename
    1242939