DocumentCode
2259474
Title
A new and fast method to compute steady state in PD-SOI circuits and its application to standard cells library characterization
Author
Liot, V. ; Flatresse, P.
Author_Institution
STMicroelectron., Crolles, France
fYear
2003
fDate
29 Sept.-2 Oct. 2003
Firstpage
170
Lastpage
171
Abstract
In this paper, a fast and robust method to simulate the steady state equilibrium in Partially Depleted SOI circuits is described. This method is presented through the evaluation of the history effect in a 0.13 μm PD-SOI technology dedicated to low power/low voltage applications.
Keywords
MOSFET; MOSFET circuits; elemental semiconductors; semiconductor device models; silicon-on-insulator; 0.13 micron; Si-SiO2; low power-low voltage applications; partially depleted SOI circuits; standard cells library characterization; steady state equilibrium; MOSFET circuits; MOSFETs; Semiconductor device modeling; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2003. IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-7815-6
Type
conf
DOI
10.1109/SOI.2003.1242940
Filename
1242940
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