Fast frequency acquisition phase frequency detectors with prediction-based edge blocking

This paper presents a new phase frequency detector (PFD) to enable fast frequency acquisition in the phase-locked loop (PLL). The three-state PFD is conventionally employed because it is simple and almost immune to the dead-zone problem, but it can miss some rising edges when the edges come during the reset time. Eliminating or reducing the missing edges caused by the reset pulse is essential in achieving fast acquisition. To cope with the missing edge problem, the proposed PFD predicts the reset signal and blocks the corresponding input signal during the reset time. The blocked edge is regenerated after the reset signal is deactivated. Experimental results show that the proposed PFD works correctly for the entire phase difference and achieves 42.1% speed-up in the acquisition time when it is applied to the conventional charge pump PLL implemented in a 0.18 mum CMOS technology.