• DocumentCode
    2259995
  • Title

    Optimization of an on-chip active cooling system based on thin-film thermoelectric coolers

  • Author

    Long, Jieyi ; Memik, Seda Ogrenci ; Grayson, Matthew

  • Author_Institution
    Dept. of EECS, Northwestern Univ., Evanston, IL, USA
  • fYear
    2010
  • fDate
    8-12 March 2010
  • Firstpage
    117
  • Lastpage
    122
  • Abstract
    In this paper, we explore the design and optimization of an on-chip active cooling system based on thin-film thermoelectric coolers (TEC). We start our investigation by establishing the compact thermal model for the chip package with integrated thin-film TEC devices. We observe that deploying an excessive number of TEC devices and/or providing the TEC devices with an improper supply current might adversely result in the overheating of the chip, rendering the cooling system ineffective. A large amount of supply current could even cause the thermal runaway of the system. Motivated by this observation, we formulate the deployment of the integrated TEC devices and their supply current setting as a system-level design problem. We propose a greedy algorithm to determine the deployment of TEC devices and a convex programming based scheme for setting the supply current levels. Leveraging the theory of inverse-positive matrix, we provide an optimality condition for the current setting algorithm. We have tested our algorithms on various benchmarks. We observe that our algorithms are able to determine the proper deployment and supply current level of the TEC devices which reduces the temperatures of the hot spots by as much as 7.5??C compared to the cases without integrated TEC devices.
  • Keywords
    cooling; greedy algorithms; integrated circuit packaging; matrix algebra; thermoelectric devices; thin film circuits; chip overheating; chip package; compact thermal model; convex programming; greedy algorithm; integrated thin-film; inverse-positive matrix; on-chip active cooling system; system-level design; thin-film thermoelectric coolers; Cooling; Current supplies; Design optimization; Greedy algorithms; Packaging; System-level design; System-on-a-chip; Thermoelectricity; Thin film devices; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
  • Conference_Location
    Dresden
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4244-7054-9
  • Type

    conf

  • DOI
    10.1109/DATE.2010.5457225
  • Filename
    5457225